1. Field of the Invention
The present invention relates to a method of mapping addresses, and a method and apparatus for driving display data, and more particularly, to a method of mapping addresses by dividing addresses into a plurality of address units and mapping the addresses in each address unit.
2. Description of the Related Art
FIG. 1 is a simplified block diagram of a display apparatus 100. As shown, the display apparatus 100 includes a memory unit 120, a source driver circuit 170, and a display panel 190.
The memory unit 120 stores gradation data DATA, and outputs the stored gradation data DATA to the source driver circuit 170 in a form of a gradation voltage (also known as a gray-scale voltage). The source driver circuit 180 outputs the gradation voltage to the display panel 190.
As described below in connection with FIG. 2, a complex wiring structure exists between the memory unit 120 and the source driver circuit 170. This results from the width of the memory unit 120 being physically smaller than that of the source driver circuit 170.
Referring to FIG. 2, a graphic memory block GRAM_BLK1 of the memory unit 120 outputs gradation data to three source driver cells SDC1, SDC2, and SDC3 over wires R1, R2 and R3. The graphic memory block GRAM_BLK1 is fabricated using various nano-scale processes, and as a result, the width of the graphic memory block GRAM_BLK1 is physically much smaller that that of the source driver cells SDC1, SDC2, and SDC3. As a result, complex wiring schemes are needed to interface the memory unit 120 and the source driver circuit 170.